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lc 2 mos 4-/8-channel high performance analog multiplexers adg408/adg409 rev. c information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2006 analog devices, inc. all rights reserved. features 44 v supply maximum ratings v ss to v dd analog signal range low on resistance (100 maximum) low power (i supply < 75 a) fast switching break-before-make switching action plug-in replacement for dg408/dg409 applications audio and video routing automatic test equipment data acquisition systems battery-powered systems sample-and-hold systems communication systems functional block diagrams adg408 s1 s8 d adg409 s1a s4b da db s4a s1b 1-of-4 decoder 1-of-8 decoder a0 a1 en a0 a1 a2 en 00027-001 figure 1. general description the adg408/adg409 are monolithic cmos analog multiplexers comprising eight single channels and four differential channels, respectively. the adg408 switches one of eight inputs to a common output as determined by the 3-bit binary address lines a0, a1, and a2. the adg409 switches one of four differential inputs to a common differential output, as determined by the 2-bit binary address lines a0 and a1. an en input on both devices is used to enable or disable the device. when the device is disabled, all channels are switched off. the adg408/adg409 are designed on an enhanced lc 2 mos process that provides low power dissipation yet gives high switching speed and low on resistance. each channel conducts equally well in both directions when on and has an input signal range that extends to the supplies. in the off condition, signal levels up to the supplies are blocked. all channels exhibit break- before-make switching action, preventing momentary shorting when switching channels. inherent in the design is low charge injection for minimum transients when switching the digital inputs. the adg408/adg409 are improved replacements for the dg408/dg409 analog multiplexers. product highlights 1. extended signal range. the adg408/adg409 are fabricated on an enhanced lc 2 mos process, giving an increased signal range that extends to the supply rails. 2. low power dissipation. 3. low r on . 4. single-supply operation. for applications where the analog signal is unipolar, the adg408/adg409 can be operated from a single rail power supply. the parts are fully specified with a single 12 v power supply and remain functional with single supplies as low as 5 v.
adg408/adg409 rev. c | page 2 of 16 table of contents features .............................................................................................. 1 applications....................................................................................... 1 functional block diagrams............................................................. 1 general description ......................................................................... 1 product highlights ........................................................................... 1 revision history ............................................................................... 2 specifications..................................................................................... 3 dual supply ................................................................................... 3 single supply ................................................................................. 4 absolute maximum ratings ............................................................6 esd caution...................................................................................6 pin configurations and function descriptions ............................7 typical performance characteristics ..............................................8 test circuits..................................................................................... 11 terminology .................................................................................... 13 outline dimensions ....................................................................... 14 ordering guide .......................................................................... 16 revision history 10 /06rev. b to rev. c updated format..................................................................universal changes to table 3............................................................................ 6 inserted table 4 and table 5............................................................ 7 updated outline dimensions ....................................................... 14 changes to ordering guide .......................................................... 15 3/03rev. a to rev. b changes to ordering guide .............................................................4 updated outline dimensions....................................................... 11 2/01revision 0: initial version
adg408/adg409 rev. c | page 3 of 16 specifications dual supply v dd = 15 v, v ss = ?15 v, gnd = 0 v, unless otherwise noted. table 1. b version t version parameter +25oc ?40oc to +85oc +25oc ?55oc to +125oc unit test conditions/comments analog switch analog signal range v ss to v dd v ss to v dd v r on 40 40 typ v d = 10 v, i s = ? 10 ma 100 125 100 125 max ?r on 15 15 max v d = +10 v, ? 10 v leakage currents source off leakage i s (off) 0.5 50 0.5 50 na max v d = 10 v, v s = 1 0 v; see m figure 19 drain off leakage i d (off) v d = 10 v; v s = 10 v; see m figure 20 adg408 1 100 1 100 na max adg409 1 50 1 50 na max channel on leakage i d, i s (on) v s = v d = 10 v; see figure 21 adg408 1 100 1 100 na max adg409 1 50 1 50 na max digital inputs input high voltage, v inh 2.4 2.4 v min input low voltage, v inl 0.8 0.8 v max input current i inl or i inh 10 10 a max v in = 0 or v dd c in , digital input capacitance 8 8 pf typ f = 1 mhz dynamic characteristics 1 t transition 120 120 ns typ r l = 300 , c l = 35 pf; 250 250 ns max v s1 = 10 v, v s8 = 10 v; see m figure 22 t open 10 10 10 10 ns min r l = 300 , c l = 35 pf; v s = 5 v; see figure 23 t on (en) 85 125 85 125 ns typ r l = 300 c l = 35 pf; 150 225 150 225 ns max v s = 5 v; see figure 24 t off (en) 65 65 ns typ r l = 300 , c l = 35 pf; 150 150 ns max v s = 5 v; see figure 24 charge injection 20 20 pc typ v s = 0 v, r s = 0 , c l = 10 nf; see figure 25 off isolation ? 75 ? 75 db typ r l = 1 k, f = 100 khz; v en = 0 v; see figure 26 channel-to-channel crosstalk 85 85 db typ rl = 1 k, f = 100 khz; see figure 27 c s (off) 11 11 pf typ f = 1 mhz c d (off) f = 1 mhz adg408 40 40 pf typ adg409 20 20 pf typ c d , c s (on) f = 1 mhz adg408 54 54 pf typ adg409 34 34 pf typ
adg408/adg409 rev. c | page 4 of 16 b version t version parameter +25oc ?40oc to +85oc +25oc ?55oc to +125oc unit test conditions/comments power requirements i dd 1 1 a typ v in = 0 v, v en = 0 v 5 5 a max i ss 1 1 a typ 5 5 a max i dd 100 100 a typ v in = 0 v, v en = 2.4 v 200 500 200 500 a max 1 guaranteed by design, not subject to production test. single supply v dd = 12 v, v ss = 0 v, gnd = 0 v, unless otherwise noted. table 2. b version t version parameter +25oc ?40oc to +85oc +25 c ?55oc to +125oc unit test conditions/comments analog switch analog signal range 0 to v dd 0 to v dd v r on 90 90 typ v d = 3 v, 10 v, i s = C1 ma leakage currents source off leakage i s (off) 0.5 50 0.5 50 na max vd = 8 v/0 v, v s = 0 v/8 v; see figure 19 drain off leakage i d (off) v d = 8 v/0 v, v s = 0 v/8 v; see figure 20 adg408 1 100 1 100 na max adg409 1 50 1 50 na max channel on leakage i d , i s (on) v s = v d = 8 v/0 v; see figure 21 adg408 1 100 1 100 na max adg409 1 50 1 50 na max digital inputs input high voltage, v inh 2.4 2.4 v min input low voltage, v inl 0.8 0.8 v max input current i inl or i inh 10 10 a max v in = 0 or v dd c in, digital input capacitance 8 8 pf typ f = 1 mhz dynamic characteristics 1 t transition 130 130 ns typ r l = 300 , c l = 35 pf; v s1 = 8 v/0 v, v s8 = 0 v/8 v; see figure 22 t open 10 10 ns typ r l = 300 , c l = 35 pf; v s = 5 v; see figure 23 t on (en) 140 140 ns typ r l = 300 c l = 35 pf; v s = 5 v; see figure 24 t off (en) 60 60 ns typ r l = 300 , c l = 35 pf; v s = 5 v; see figure 24 charge injection 5 5 pc typ v s = 0 v, r s = 0, c l = 10 nf; see figure 25 off isolation C75 C75 db typ r l = 1 k f = 100 khz; v en = 0 v; see figure 26
adg408/adg409 rev. c | page 5 of 16 b version t version parameter +25oc ?40oc to +85oc +25 c ?55oc to +125oc unit test conditions/comments channel-to-channel crosstalk 85 85 db typ r l = 1 k, f = 100 khz; see figure 27 c s (off) 11 11 pf typ f = 1 mhz c d (off) f = 1 mhz adg408 40 40 pf typ adg409 20 20 pf typ c d , c s (on) f = 1 mhz adg408 54 54 pf typ adg409 34 34 pf typ power requirements i dd 1 1 a typ v in = 0 v, v en = 0 v 5 5 a max i dd 100 100 a typ v in = 0 v, v en = 2.4 v 200 500 200 500 a max 1 guaranteed by design, not subject to production test.
adg408/adg409 rev. c | page 6 of 16 absolute maximum ratings t a = 25c, unless otherwise noted. table 3. parameter rating v dd to v ss 44 v v dd to gnd ?0.3 v to +32 v v ss to gnd +0.3 v to ?32 v analog, digital inputs v ss ? 2 v to v dd + 2 v or 20 ma, whichever occurs first continuous current, s or d 20 ma peak current, s or d (pulsed at 1 ms, 10% duty cycle maximum) 40 ma operating temperature range industrial (b version) ?40 c to +85c extended (t version) ?55 c to +125c storage temperature range ?65 c to +150c junction temperature 150c cerdip package, power dissipation 900 mw ja , thermal impedance 76c/w lead temperature, soldering (10 sec) 300c pdip package, power dissipation 470 mw ja, thermal impedance 117c/w lead temperature, soldering (10 sec) 260c tssop package, power dissipation 450 mw ja , thermal impedance 155c/w jc , thermal impedance 50c/w soic package, power dissipation 600 mw ja , thermal impedance 77c/w lead temperature, soldering vapor phase (60 sec) 215c infrared (15 sec) 220c stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. esd caution
adg408/adg409 rev. c | page 7 of 16 pin configurations and function descriptions a0 1 en 2 v ss 3 s1 4 a1 16 a2 15 gnd 14 v dd 13 s2 5 s5 12 s3 6 s6 11 s4 7 s7 10 d 8 s8 9 adg408 top view (not to scale) 00027-002 figure 2. adg408 pin configuration a0 1 en 2 v ss 3 s1a 4 a1 16 gnd 15 v dd 14 s1b 13 s2a 5 s3a 6 s4a 7 s2b 12 s3b 11 s4b 10 da 8 db 9 adg409 top view (not to scale) 00027-003 figure 3. adg409 pin configuration table 4. adg408 pin function descriptions pin no. mnemonic description 1 a0 logic control input. 2 en active high digital input. when low, the device is disabled and all switches are off. when high, ax logic inputs determine on switches. 3 v ss most negative power supply potential in dual supplies. in single-supply applications, it can be connected to ground. 4 s1 source terminal 1. can be an input or an output. 5 s2 source terminal 2. can be an input or an output. 6 s3 source terminal 3. can be an input or an output. 7 s4 source terminal 4. can be an input or an output. 8 d drain terminal. can be an input or an output. 9 s8 source terminal 8. can be an input or an output. 10 s7 source terminal 7. can be an input or an output. 11 s6 source terminal 6. can be an input or an output. 12 s5 source terminal 5. can be an input or an output. 13 v dd most positive power supply potential. 14 gnd ground (0 v) reference. 15 a2 logic control input. 16 a1 logic control input. table 5. adg409 pin function descriptions pin no. mnemonic description 1 a0 logic control input. 2 en active high digital input. when low, the device is disabled and all switches are off. when high, ax logic inputs determine on switches. 3 v ss most negative power supply potential in dual supplies. in single-supply applications, it can be connected to ground. 4 s1a source terminal 1a. can be an input or an output. 5 s2a source terminal 2a. can be an input or an output. 6 s3a source terminal 3a. can be an input or an output. 7 s4a source terminal 4a. can be an input or an output. 8 da drain terminal a. can be an input or an output. 9 db drain terminal b. can be an input or an output. 10 s4b source terminal 4b. can be an input or an output. 11 s3b source terminal 3b. can be an input or an output. 12 s2b source terminal 2b. can be an input or an output. 13 s1b source terminal 1b. can be an input or an output. 14 v dd most positive power supply potential. 15 gnd ground (0 v) reference. 16 a1 logic control input. table 6. adg408 truth table a2 a1 a0 en on switch x x x 0 none 0 0 0 1 1 0 0 1 1 2 0 1 0 1 3 0 1 1 1 4 1 0 0 1 5 1 0 1 1 6 1 1 0 1 7 1 1 1 1 8 table 7. adg409 truth table on switch a1 a0 en pair x x 0 none 0 0 1 1 0 1 1 2 1 0 1 3 1 1 1 4
adg408/adg409 rev. c | page 8 of 16 typical performance characteristics 120 20 80 40 100 60 v d [v s ](v) r on ( ? ) t a =25c v dd =+5v v ss =?5v v dd = +12v v ss = ?12v v dd = +15v v ss =?15v v dd =+10v v ss = ?10v ?15 ?10 ?5 0 5 10 15 00027-004 figure 4. r on as a function of v d (v s ): dual-supply voltage 100 30 80 70 50 40 60 90 v dd =+15v v ss = ?15v 125c 85c 25c v d [v s ](v) ?15 ?10 ?5 0 5 10 15 r on ( ? ) 00027-005 figure 5. r on as a function of v d (v s ) for different temperatures 0.2 ?0.2 leakage current (na) 0 ?0.1 0.1 i d (off) i s (off) i d (on) v d [v s ](v) ?15 ?10 ?5 0 5 10 15 t a = 25c v dd =+15v v ss = ?15v 00027-006 figure 6. leakage currents as a function of v d (v s ) 180 40 140 120 80 60 160 100 v d [v s ](v) r on ( ? ) t a =25c v dd =5v v ss =0v v dd =12v v ss =0v v dd =15v v ss =0v v dd =10v v ss =0v 03691 21 00027-007 5 figure 7. r on as a function of v d (v s ): single-supply voltage 130 60 100 80 70 90 120 110 r on ( ? ) v d [v s ](v) v dd =12v v ss =0v 125c 85c 25c 024681012 00027-008 figure 8. r on as a function of v d (v s ) for different temperature 0.04 ?0.06 leakage current (na) 0 ?0.04 0.02 ?0.02 v d [v s ](v) t a = 25c v dd =12v v ss =0v i s (off) i d (off) i d (on) 024681012 0 0027-009 figure 9. leakage currents as a function of v d (v s )
adg408/adg409 rev. c | page 9 of 16 120 20 time (ns) 60 40 100 80 v in (v) v dd = +15v v ss = ?15v t transition t off (en) t on (en) 13579111315 00027-010 figure 10. switching time vs. v in (bipolar supply) 400 0 time (ns) 200 100 300 v in =5v 5791 11 31 v supply (v) 5 t transition t on (en) t off (en) 00027-011 figure 11. switching time vs. single supply frequency (hz) 100 1k 10k i dd (a) v dd = +15v v ss = ?15v en = 2.4v en = 0v 10 100 1k 10k 100k 1m 10m 0 0027-012 figure 12. positive supply current vs. switching frequency 140 40 time (ns) 100 60 120 80 v in (v) v dd =12v v ss =0v 135791113 t off (en) t on (en) t transition 00027-013 figure 13. switching time vs. v in (single supply) 300 0 5 15 7 time (ns) 9 11 13 200 100 v in =5v v supply (v) t transition t on (en) t off (en) 00027-014 figure 14. switching time vs. bipolar supply en = 0v en = 2.4v v dd = +15v v ss =?15v frequency (hz) i ss (a) 10k 1k 100 10 0 ?10 10 100 1k 10k 100k 1m 10m 00027-015 figure 15. negative supply current vs. switching frequency
adg408/adg409 rev. c | page 10 of 16 frequency (hz) 110 70 off isolation (db) 90 80 100 1k 10k 100k 1m v dd = +15v v ss = ?15v 00027-016 figure 16. off isolation vs. frequency 10k frequency (hz) 110 70 crosstalk (db) 90 80 100 60 v dd =+15v v ss = ?15v 1k 100k 1m 0 0027-017 figure 17. crosstalk vs. frequency
adg408/adg409 rev. c | page 11 of 16 test circuits r on =v1/i ds v s sd v1 i ds 00027-018 figure 18. on resistance s1 d s2 s8 a en gnd 0.8v i s (off) v s v d v dd v ss v dd v ss 00027-019 figure 19. i s (off) i d (off) s1 d s2 s8 a en gnd 0.8v v s v d v ss v dd v ss v dd 00027-020 figure 20. i d (off) s1 d s8 a en gnd 2.4v i d (on) v d v s v dd v ss v dd v ss 00027-021 figure 21. i d (on) 3v 0v output t r < 20ns t f < 20ns address drive (v in ) t transition t transition 50% 50% 90% 90% output adg408 1 a0 a1 a2 50 ? 300 ? gnd s1 s2?s7 s8 d 35pf v in 2.4v en v dd v ss v dd v ss v s1 v s8 1 similar connection for adg409. 00027-022 figure 22. switching time of multiplexer, t transltlon output adg408 1 a0 a1 a2 50? 300 ? gnd s1 s2?s7 s8 d 35pf v in 2.4v en v dd v ss v dd v ss v s 1 similar connection for adg409. 3v 0v output 80% 80% address drive (v in ) 00027-023 t open figure 23. break-before-make delay, t open
adg408/adg409 rev. c | page 12 of 16 output adg408 1 a0 a1 a2 50? 300 ? gnd s1 s2?s8 d 35pf v in en v dd v ss v dd v ss v s 1 similar connection for adg409. 3v 0v o utput 50% 50% t off (en) t on (en) 0.9v o 0.9v o enable d r ive (v in ) 00027-024 figure 24. enable delay, t on (en), t off (en) 3v v in v out q inj =c l v out v out d s en gnd c l 10nf v out v in r s v s v dd v ss v dd v ss a0 a1 a2 adg408 1 1 similar connection for adg409. 00027-025 figure 25. charge injection off isolation = 20 log v out /v in adg408 a0 a1 a2 en gnd d s1 s8 0v 1k? v out v s v ss v dd v ss v dd 00027-026 figure 26. off isolation adg408 a0 a1 a2 en gnd d s1 s8 1k? 1k? s2 2.4v crosstalk = 20 log v out /v in v ss v dd v ss v dd v out v s 0 0027-027 figure 27. channel-to-channel crosstalk
adg408/adg409 rev. c | page 13 of 16 terminology r on ohmic resistance between d and s. r on difference between the r on of any two channels. i s (off) source leakage current when the switch is off. i d (off) drain leakage current when the switch is off. i d , i s (on) channel leakage current when the switch is on. v d (v s ) analog voltage on terminal d and terminal s. c s (off) channel input capacitance for off condition. c d (off) channel output capacitance for off condition. c d , c s (on) on switch capacitance. c in digital input capacitance. t on (en) delay time between the 50% and 90% points of the digital input and switch on condition. t off (en) delay time between the 50% and 90% points of the digital input and switch off condition. t transition delay time between the 50% and 90% points of the digital inputs and the switch on condition when switching from one address state to another. t open off time measured between the 80% point of both switches when switching from one address state to another. v inl maximum input voltage for logic 0. v inh minimum input voltage for logic 1. i inl (i inh ) input current of the digital input. crosstalk a measure of unwanted signal that is coupled through from one channel to another as a result of parasitic capacitance. off isolation a measure of unwanted signal coupling through an off channel. charge injection a measure of the glitch impulse transferred from the digital input to the analog output during switching. i dd positive supply current. i ss negative supply current.
adg408/adg409 rev. c | page 14 of 16 outline dimensions controlling dimensions are in inches; millimeter dimensions (in parentheses) are rounded-off inch equivalents for reference only and are not appropriate for use in design. corner leads may be configured as whole or half leads. compliant to jedec standards ms-001-ab 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) 0.150 (3.81) 0.130 (3.30) 0.115 (2.92) 0.070 (1.78) 0.060 (1.52) 0.045 (1.14) 16 1 8 9 0.100 (2.54) bsc 0.800 (20.32) 0.790 (20.07) 0.780 (19.81) pin 1 0.210 (5.33) max seating plane 0.015 (0.38) min 0.005 (0.13) min 0.280 (7.11) 0.250 (6.35) 0.240 (6.10) 0.060 (1.52) max 0.430 (10.92) max 0.014 (0.36) 0.010 (0.25) 0.008 (0.20) 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.015 (0.38) gauge plane 0.195 (4.95) 0.130 (3.30) 0.115 (2.92) figure 28. 16-lead plastic dual in-line package [pdip] narrow body (n-16) dimensions shown in inches and (millimeters) controlling dimensions are in inches; millimeter dimensions (in parentheses) are rounded-off inch equivalents for reference only and are not appropriate for use in design. 0.840 (21.34) max 15 0 0.320 (8.13) 0.290 (7.37) 0.015 (0.38) 0.008 (0.20) 0 .200 (5.08) max 0.200 (5.08) 0.125 (3.18) 0.023 (0.58) 0.014 (0.36) 0.310 (7.87) 0.220 (5.59) 0.005 (0.13) min 0.098 (2.49) max 0.100 (2.54) bsc pin 1 1 8 9 16 seating plane 0.150 (3.81) min 0.070 (1.78) 0.030 (0.76) 0.060 (1.52) 0.015 (0.38) figure 29. 16-lead ceramic dual in-line package [cerdip] (q-16) dimensions shown in inches and (millimeters)
adg408/adg409 rev. c | page 15 of 16 controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design. compliant to jedec standards ms-012-ac 16 9 8 1 4.00 (0.1575) 3.80 (0.1496) 10.00 (0.3937) 9.80 (0.3858) 1.27 (0.0500) bsc 6.20 (0.2441) 5.80 (0.2283) seating plane 0.25 (0.0098) 0.10 (0.0039) 0.51 (0.0201) 0.31 (0.0122) 1.75 (0.0689) 1.35 (0.0531) 8 0 0.50 (0.0197) 0.25 (0.0098) 1.27 (0.0500) 0.40 (0.0157) 0.25 (0.0098) 0.17 (0.0067) coplanarity 0.10 45 figure 30. 16-lead standard small outline package [soic_n] narrow body (r-16) dimensions shown in millimeters and (inches) 16 9 8 1 pin 1 seating plane 8 0 4.50 4.40 4.30 6.40 bsc 5.10 5.00 4.90 0.65 bsc 0.15 0.05 1.20 max 0.20 0.09 0.75 0.60 0.45 0.30 0.19 coplanarity 0.10 compliant to jedec standards mo-153-ab figure 31. 16-lead thin shrink small outline package [tssop] (ru-16) dimensions shown in millimeters
adg408/adg409 rev. c | page 16 of 16 ordering guide model temperature range package description package option adg408bn ? 40c to +85c 16-lead plastic dual in-line package [pdip] n-16 adg408bnz 1 ? 40c to +85c 16-lead plastic dual in-line package [pdip] n-16 adg408br ? 40c to +85c 16-lead narrow body small outline package [soic_n] r-16 adg408br-reel ? 40c to +85c 16-lead narrow body small outline package [soic_n] r-16 ADG408BR-REEL7 ? 40c to +85c 16-lead narrow body small outline package [soic_n] r-16 adg408bru ? 40c to +85c 16-lead thin shrink small outline package [tssop] ru-16 adg408bru-reel ? 40c to +85c 16-lead thin shrink small outline package [tssop] ru-16 adg408bru-reel7 ? 40c to +85c 16-lead thin shrink small outline package [tssop] ru-16 adg408bruz 1 ? 40c to +85c 16-lead thin shrink small outline package [tssop] ru-16 adg408bruz-reel 1 ? 40c to +85c 16-lead thin shrink small outline package [tssop] ru-16 adg408bruz-reel7 1 ? 40c to +85c 16-lead thin shrink small outline package [tssop] ru-16 adg408brz 1 ? 40c to +85c 16-lead narrow body small outline package [soic_n] r-16 adg408brz-reel 1 ? 40c to +85c 16-lead narrow body small outline package [soic_n] r-16 adg408brz-reel7 1 ? 40c to +85c 16-lead narrow body small outline package [soic_n] r-16 adg408tq ? 55c to +125c 16-lead ceramic dual in-line package [cerdip] q-16 adg408bchips die adg409bn ? 40c to +85c 16-lead plastic dual in-line package [pdip] n-16 adg409bnz 1 ? 40c to +85c 16-lead plastic dual in-line package [pdip] n-16 adg409br ? 40c to +85c 16-lead narrow body small outline package [soic_n] r-16 adg409br-reel ? 40c to +85c 16-lead narrow body small outline package [soic_n] r-16 adg409br-reel7 ? 40c to +85c 16-lead narrow body small outline package [soic_n] r-16 adg409bru ? 40c to +85c 16-lead thin shrink small outline package [tssop] ru-16 adg409bru-reel ? 40c to +85c 16-lead thin shrink small outline package [tssop] ru-16 adg409bru-reel7 ? 40c to +85c 16-lead thin shrink small outline package [tssop] ru-16 adg409bruz 1 ? 40c to +85c 16-lead thin shrink small outline package [tssop] ru-16 adg409bruz-reel 1 ? 40c to +85c 16-lead thin shrink small outline package [tssop] ru-16 adg409bruz-reel7 1 ? 40c to +85c 16-lead thin shrink small outline package [tssop] ru-16 adg409brz 1 ? 40c to +85c 16-lead narrow body small outline package [soic_n] r-16 adg409brz-reel 1 ? 40c to +85c 16-lead narrow body small outline package [soic_n] r-16 adg409brz-reel7 1 ? 40c to +85c 16-lead narrow body small outline package [soic_n] r-16 adg409tq ? 55c to +125c 16-lead ceramic dual in-line package [cerdip] q-16 1 z = pb-free part. ?2006 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. c00027-0-10 /06(c)

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